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本文介绍2400bit/s双信道线性预测编码(LPC)声码器的硬件实现。该声码器硬件部分采用最新的2900系列“位片”微处理器和2k RAM和1k ROM数据存储器。系统设计成双总线结构,时钟周期208ns。该声码器的一大特点是能同时处理两个话音信道。全文着重对该声码器系统的固化程序(firmware)开发作了详细叙述。对声码器的硬件设计也作了介绍。
This article describes the 2400bit / s dual-channel linear predictive coding (LPC) vocoder hardware implementation. The vocoder hardware part uses the latest 2900 series “bit slice” microprocessors and 2k RAM and 1k ROM data memory. System designed into a double bus structure, clock cycle 208ns. A key feature of the vocoder is the ability to handle two voice channels simultaneously. The full text focuses on the vocoder system firmware development (firmware) made a detailed description. Vocoder hardware design is also introduced.