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一、前言 随着半导体元器件的微细化,对深宽比(ASPECT)高的电极孔采用填充技术已成为一项十分必要的手段。采用的填充技术有金属填充法,选择钨(W)及其他金属等,或者多晶淀积后的刻平法(ETCH BACK),选择多晶法等这些方法均有报导。它们各具优缺点,曾在微米及亚微米的填充技术中用过,然而效果均不十分理想,采用W塞可以降低电极接触电阻,而且对下面扩散层的型号(N.P)无所选择,这是该方法的长处。但选择W金属时,其选择性较差。而其他金属,存在着与SiO_2粘附性差问题。以上无论那种方法均未达到大批量生产水平,在另一方面,多晶塞方法因塞体本身电阻过高,降低其电阻是个重要的问题。同时,为配合下部的P、N扩散层,有必要对多晶塞体进行相应的掺杂,由此带来了加工工艺过长的缺点。但是采用现有的方法,完全有可能保证形成一个较为稳定的工艺过程。我们选用了刻平法形成多晶塞填充手段,就其对亚微米器件应用的可能性以及低阻电极接触的形成方式做一研究。本文就有关情况做一阐述。
I. INTRODUCTION With the miniaturization of semiconductor components, it has become a very necessary method to fill the electrode holes with high aspect ratio (ASPECT). Filling techniques such as metal filling, tungsten (W) and other metals, or ETCH BACK after polycrystalline deposition, polycrystalline selection, and the like have been reported. They have their own advantages and disadvantages, have been in the micron and sub-micron filling technology used, but the effect is not very satisfactory, the use of W plug can reduce the electrode contact resistance, and below the diffusion layer type (NP) have no choice, which Is the strength of the method. However, the choice of W metal, its less selective. However, other metals have poor adhesion to SiO 2. Above all, none of the above methods have reached the level of mass production. On the other hand, the polycrystalline plug method is an important issue because the resistance of the plug body itself is too high and its resistance is lowered. At the same time, in order to cooperate with the lower P, N diffusion layer, it is necessary to do corresponding doping to the polycrystalline plug body, which brings the disadvantage that the processing technology is too long. However, with the existing methods, it is entirely possible to ensure a more stable process. We chose the kring method to form a polycrystalline plug filling means, the possibility of its application of submicron devices and the formation of low resistance electrode contact to do a study. This article makes an elaboration on the situation.