Design and optimization of a 0.5 V CMOS LNA for 2.4-GHz WSN application

• 作 者: 陈亮 李智群
• 机 构: Institute of RF- & OE-ICs,Southeast University,Engineering Research Center of RF-ICs & RF-Systems,Mi
• 出 处: 半导体学报
• 发表日期: 2012年10期
• 关键词: matching amplifier consuming folded figure showing instance applicable drain ver

This paper presents a low noise amplifier(LNA),which could work at an ultra-low voltage of 0.5 V and was optimized for WSN application using 0.13μm RF-CMOS technology.The circuit was analyzed and a new optimization method for a folded cascode LNA was introduced.Measured results of the proposed circuit demonstrated a power gain of 14.13 dB,consuming 3 mW DC power,showing 1.96 dB NF and an input 1-dB compression point of -19.9 dBm.Both input power matching(S_(11)) and output power matching(S_(22)) were below -10 dB.The results indicate that this LNA is fully applicable to low voltage and low power applications.

This paper presents a low noise amplifier (LNA), which could work at an ultra-low voltage of 0.5 V and was optimized for WSN application using 0.13 μm RF-CMOS technology. The circuit was analyzed and a new optimization method for a folded cascode LNA was introduced.Measured results of the proposed circuit demonstrated a power gain of 14.13 dB, consuming 3 mW DC power, showing 1.96 dB NF and an input 1-dB compression point of -19.9 dBm.Both input power matching (S_ (11) ) and output power matching (S_ (22)) were below -10 dB. The results indicate that this LNA is fully applicable to low voltage and low power applications.