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一个现代化的数字式频率合成器,其性能的好坏,主要取决于其相位噪声的大小,而它在很大程度上取决于频率合成器中的压控振荡器(VCO)本身相位噪声的优劣。设计和制造出低相位噪声的 VCO 就成为设计制造频率合成器的一个关键问题。一、电路的主要技术要求对于锁相环中的 VCO,一般应考虑以下几个方面的要求:(1)频率变化范围必须满足锁相环所要求的输出范围,并要有一定的余量。(2)频率稳定度要求长期慢漂移不超过锁相环的同步带,对取样环更不能超过±f_r/2(f_r为参考脉冲频率)。(3)要求 VCO 的相位噪声 S_((?)VCO)越小越好。(4)希望输出频率随输入电压的变化尽可能是线性的,因为如果 VCO 电压频率特性是非线性的,阻尼系数ζ与环路固有频率ω_n 就会随
A modern digital frequency synthesizer, its performance is good or bad, mainly depends on the size of its phase noise, and it depends largely on the frequency synthesizer voltage-controlled oscillator (VCO) itself phase noise inferior. Designing and fabricating a VCO with low phase noise becomes a key issue in the design and manufacture of frequency synthesizers. First, the main technical requirements of the circuit For the VCO in the PLL, generally should consider the following aspects of the requirements: (1) the frequency range of the PLL must meet the required output range, and have some margin. (2) The frequency stability requirements of long-term slow drift does not exceed the belt of the PLL, the sampling ring can not exceed ± f_r / 2 (f_r reference pulse frequency). (3) It is required that the VCO phase noise S _ ((?) VCO) be as small as possible. (4) It is desirable that the output frequency be as linear as possible with the input voltage because if the VCO voltage and frequency characteristics are non-linear, the damping coefficient ζ and the natural frequency of the loop ω_n will follow