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保护方式下的异常与中断管理是微处理器设计的重要组成部分．文中探讨了异常与中断的数据结构、定义、表，给出了保护方式下的异常与中断管理算法；提出了异常／中断管理单元（ＥＩＭＵ）的细胞群结构，并指出细胞是异常／中断管理单元的基本测试单位；系统评价了任务门，中断门／陷阱门区别及优缺点．最后用ＥＤＡ 工具ＭＥＮＴＯＲ ＧＲＡＰＨＩＣＳ对异常与中断管理单元及其算法的ＲＴＬ级ＶＨＤＬ描述进行综合与仿真，验证了其正确性与有效性
Abnormal and interrupt management under protection mode is an important part of microprocessor design. In this paper, the data structures, definitions and tables of anomaly and interrupt are discussed, and the anomaly and interrupt management algorithm under protection mode is given. The cell structure of anomaly / interrupt management unit (EIMU) is proposed and the cell is anomaly / interrupt management Unit of the basic test unit; system evaluation of the task gate, interrupt gate / trap door difference and advantages and disadvantages. Finally, we use the EDA tool MENTOR GRAPHICS to synthesize and simulate the RTL VHDL description of the anomaly and interrupt management unit and its algorithm, and verify its correctness and validity