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本文分为两大部份。第Ⅰ部份讨论能夠再生时钟频率为160兆赫,宽度为6.25毫微秒脈冲的晶体管线路。第Ⅱ部份讨论将16位10兆赫的信号合成一个160光赫信号的技术。本文讨论了两种再生脈冲的方法。第一种用一个直流电平恢复器来识别信号,用一个恒流符合线路来重新产生脈冲。第二种方法利用信号的变化来识别脈冲,用一个双稳线路来重新产生脈冲。第二种方法里的定时是由一个恒流符合门来得到的。本文提出了一种井-串行的增频技术,利用它可以将16个10兆赫的信号合成一个160兆赫的脈冲链。这16个信号与10兆赫的控制脈冲同时送到16个“与”门。
This article is divided into two parts. Part I discusses transistor circuits capable of regenerating a clock at 160 MHz and a pulse width of 6.25 ns. Part II discusses the technique of combining a 16-bit, 10-MHz signal into a 160-GHz signal. This article discusses two methods of regenerating pulses. The first uses a DC level recoverer to identify the signal and a constant current line to regenerate the pulse. The second method uses the change of the signal to identify the pulse and use a bistable line to regenerate the pulse. The second method of timing is obtained by a constant current coincidence gate. This paper presents a well-serial up-conversion technique that allows the synthesis of 16 10 MHz signals into a 160 MHz pulse train. These 16 signals are sent to 16 AND gates simultaneously with 10 MHz control pulses.