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本文介绍一种１０２４位ＭＯＳ随机存储器电路。采用Ｐ沟硅栅工艺，标准的四管单元结构。电路设计的主要特点是：１．在地址译码器中串入由内部时钟控制的接地管，完全消除了直流通路，使功耗大大降低；２．地址码封锁电路采用了一种由时钟控制的单管门形式，简化了电路；３．字线通过一个小跨导的放电管接地，提高了抗干扰能力。
This article describes a 1024-bit MOS random access memory circuit. P-groove silicon gate technology, the standard four-tube cell structure. The main features of the circuit design are: 1. In the address decoder string into the internal clock controlled by the ground tube, completely eliminating the DC path, so that greatly reduce power consumption; 2. The address code blockade circuit uses a single-gate form controlled by a clock, simplifying the circuit; 3. The word line is grounded through a small transconductance discharge tube, improving the immunity to interference.