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A novel slow-down set waveform is proposed to improve the set performance and a 1kb phase change random access memory chip fabricated with a 130 nm CMOS technology is implemented to investigate the set performance by different set programming strategies based on this new set pulse.The amplitude difference(I_1-I_2) of the set pulse is proved to be a crucial parameter for set programming.We observe and analyze the cell characteristics with different I_1-I_2 by means of thermal simulations and high-resolution transmission electron microscopy,which reveal that an incomplete set programming will occur when the proposed slow-down pulse is set with an improperly high I_1-I_2.This will lead to an amorphous residue in the active region.We also discuss the programming method to avoid the set performance degradations.
A novel slow-down set waveform is proposed to improve the set performance and a 1kb phase change random access memory chip fabricated with a 130 nm CMOS technology is implemented to investigate the set performance by different set programming strategies based on this new set pulse. amplitude difference (I_1 -I_2) of the set pulse is proved to be a crucial parameter for set programming. We observe and analyze the cell characteristics with different I_1-I_2 by means of thermal simulations and high-resolution transmission electron microscopy, which reveal that an incomplete set programming will occur when the proposed slow-down pulse is set with an improperly high I_1-I_2.This will lead to an amorphous residue in the active region .We also discuss the programming method to avoid the set performance degradations.