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瞬间切换噪声会在多层板电源层power/gnd上形成电压扰动,而电压扰动是造成高速电路设计不稳,位错误率上升的原因之一,故需在布局前阶段先作电源完整性分析。
Instantaneous switching of noise creates voltage disturbances in the power / gnd of the multilayer power plane, and voltage disturbances are one of the causes of high-speed circuit design instability and bit error rates. Therefore, power integrity analysis .