Leakage Reduction Using DTSCL and Current Mirror SCL Logic Structures for LP-LV Circuits

• 作 者: Sanjeev Rai Ram Awadh Mishra S
• 机 构: DepartmentofElectronics&,CommunicationEngineering,NationalInstituteofTechnology
• 出 处: 电路与系统(英文)
• 发表日期: 2013年1期
• 关键词: CMOS Integrated CIRCUITS CMOS LOGIC Circuit Dynamic Threshold MOS (DTMOS) Power-

This paper presents a novel approach to design robust Source Coupled Logic (SCL) for implementing ultra low power circuits. In this paper, we propose two different source coupled logic structures and analyze the performance of these structures with STSCL