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本文提出了一些新的双极存贮单元,其读/写电流与待机电流之比高达40～200,而普通的存贮单元该比值只能达到0.8～8。在待机条件下,单元的集电极阻抗是很高的,而当存取时,该阻抗就变得很低了。这种器件结构要求熟练地运用诸如薄化外延层或薄化基区作为大电阻或开关阻抗,而使片子面积为最小。电路板测试结果表明,它的取数时间小于4毫微秒,周期时间小于15毫微秒,待机功耗每位是50～200微瓦。利用这种器件结构己制出了一个288位的大规模集成电路(LSI),其取数时间为4毫微秒,写入时间为4毫微秒。
In this paper, some new bipolar memory cells are proposed. The ratio of read / write current to standby current is as high as 40-200, while the average memory cell ratio can only reach 0.8-8. In standby conditions, the cell's collector impedance is high, and when accessed, the impedance becomes very low. Such device structures require skillful use of thinned epitaxial layers or thinned base regions as large or switching impedances to minimize sheet area. Circuit board test results show that it takes less than 4 nanoseconds, cycle time is less than 15 nanoseconds, standby power per bit is 50 ~ 200 microwatts. Using this device structure has been made a 288-bit large scale integrated circuit (LSI), the fetch time of 4 nanoseconds, write time of 4 nanoseconds.