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An improved dual-channel 4H-SiC MESFET with high doped n-type surface layer and step-gate structure is proposed, and the static and dynamic electrical performances are analyzed.A high doped n-type surface layer is applied to obtain a low source parasitic series resistance, while the step-gate structure is utilized to reduce the gate capacitance by the elimination of the depletion layer extension near the gate edge, thereby improving the RF characteristics and still maintaining a high breakdown voltage and a large drain current in comparison with the published SiC MESFETs with a dual-channel layer.Detailed numerical simulations demonstrate that the gate-to-drain capacitance, the gate-to-source capacitance, and the source parasitic series resistance of the proposed structure are about 4%, 7%, and 18% smaller than those of the dual-channel structure, which is responsible for 1.4 and 6 GHz improvements in the cut-off frequency and the maximum oscillation frequency.
An improved dual-channel 4H-SiC MESFET with high doped n-type surface layer and step-gate structure is proposed, and the static and dynamic electrical specifications are applied. A high doped n-type surface layer is applied to obtain a low source parasitic series resistance, while the step-gate structure is utilized to reduce the gate capacitance by the elimination of the depletion layer extension near the gate edge, thereby improving the RF characteristics and still maintaining a high breakdown voltage and a large drain current in comparison with the published SiC MESFETs with a dual-channel layer. Detailed numerical simulations demonstrate that the gate-to-drain capacitance, the gate-to-source capacitance, and the source parasitic series resistance of the proposed structures are about 4%, 7% and 18% smaller than those of the dual-channel structure, which is responsible for 1.4 and 6 GHz improvements in the cut-off frequency and the maximum oscillation frequency.