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最近提出了采用静电感应晶体管逻辑(SITL)制备低功耗、高速度的双极型大规模集成电路,并出现了在集成注入逻辑中采用静态感应晶体管的应用。图中表示SIT用于集成注入逻辑。本文介绍在一个芯片中,具有亚毫微秒ECL与低功耗SITL结合的双极型大规模集成电路,采用一种氧化物隔离技术,这些器件互相兼容,应用于1GHZ的频率合成器系统中。 图1所示的是SITL结构,在薄的非掺杂外延层上形成静电感应晶体管的沟道区。通过表面注入少量P型杂质(B)补偿
Recently, the use of SITL to fabricate bipolar LSIs with low power consumption and high speed has been proposed, and the application of static induction transistors in integrated injection logic has emerged. The figure shows the SIT for integrated injection logic. This article describes a bipolar LSI with sub-nanosecond ECL combined with low-power SITL in one chip, using an oxide isolation technology that is compatible with each other in a 1 GHz frequency synthesizer system . Figure 1 shows a SITL structure in which a channel region of an electrostatic induction transistor is formed on a thin non-doped epitaxial layer. A small amount of P-type impurity (B) is injected through the surface to compensate