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引言在模拟调频接收机中,利用环路跟踪技术设法解决门限问题是一重要课题。常用的两个方法是锁相环(PLL)和频率反馈调频(FBFM)接收机、如图1a,b所示。虽然这两种系统可以用相同的数学模型表示,但在门限降低的机理上是根本不同的。频率跟踪接收机力求保持一小中频频偏,以便使用一窄的中频滤波器,从而减少鉴频器输入端的噪声。在另一方面,锁相环仅要求足够的载波功率以维持小的相位误差,并使其VCO输出频率与输入信号的相同。但发射频偏变得太大时,则相位误差增加,并且锁相环经常失
Introduction In analog FM receivers, the use of loop tracking techniques to try to solve the threshold problem is an important issue. The two most commonly used methods are a phase-locked loop (PLL) and a frequency-feedback frequency modulation (FBFM) receiver, as shown in Figure 1a, b. Although both systems can be represented using the same mathematical model, the mechanism for threshold reduction is fundamentally different. The frequency tracking receiver seeks to maintain a small midband offset to use a narrow IF filter to reduce the noise at the discriminator input. On the other hand, the phase-locked loop only requires enough carrier power to maintain a small phase error and to make its VCO output frequency the same as the input signal. However, when the transmit frequency offset becomes too large, the phase error increases, and the phase-locked loop is often lost