Hysteresis analysis of graphene transistor under repeated test and gate voltage stress

• 作 者: 杨杰 贾昆鹏 粟雅娟 陈阳 赵超
• 机 构: Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics,
• 出 处: Journal of Semiconductors
• 发表日期: 2014年09期
• 关键词: transistor trapped neutral systematically charges repeated drain sweep doping tr

The current transport characteristic is studied systematically based on a back-gate graphene field effect transistor, under repeated test and gate voltage stress. The interface trapped charges caused by the gate voltage sweep process screens the gate electric field, and results in the neutral point voltage shift between the forth and back sweep direction. In the repeated test process, the neutral point voltage keeps increasing with test times in both forth and back sweeps, which indicates the existence of interface trapped electrons residual and accumulation. In gate voltage stress experiment, the relative neutral point voltage significantly decreases with the reducing of stress voltage, especially in –40 V, which illustrates the driven-out phenomenon of trapped electrons under negative voltage stress.

The current transport characteristic is studied systematically based on a back-gate graphene field effect transistor, under repeated test and gate voltage stress. The interface trapped charges caused by the gate voltage sweep process screens the gate electric field, and results in the neutral point voltage In the repeated test process, the neutral point voltage keeps increasing with test times in both forth and back sweeps, which shows the existence of interface trapped electrons residual and accumulation. In gate voltage stress experiment, the relative neutral point voltage significantly decreases with the reducing of stress voltage, especially in -40 V, which shows the driven-out phenomenon of trapped electrons under negative voltage stress.