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通过模拟分析了 0 18μmCMOS工艺条件下的信号完整性问题 .在进行串扰延迟和噪声分析中发现了一些规律 ,这些规律对以后的设计有一定的指导意义 .
The problem of signal integrity under the 0 18μm CMOS process was analyzed by simulation, and some rules were found during the crosstalk delay and noise analysis, and these rules have some guiding significance for the future design.