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到目前,只有具有昂贵的硬件模拟器或有足够的时间来运行软工具的人才可能作故障模拟.Intrins ix 公司的Fas-Fault 系列故障模拟工具将基于硬件的核心部分与一套有效的软件相结合,以2×10/秒的计算速度来完成分析.头两个Fas Fault 版本能够模拟10000和25(?)00个数字门,到今年底100000门的版本可以投入使用.基于加速器的Fas Fault 产品实现快速、确定、顺序的故障模拟.通过在传统的硬件中建立一个虚拟测试器,用户能够以司样的速度实现单元延迟逻辑模拟.例如,Intrinsix标准的100000门规模的电路逻辑模拟以9500个向量,用7秒钟完成.Fas Fault 由基于C 语言的软件程序和一个插有30236和80(?)6扩展板的PC/AT 组成.该系统也能用作为连在一个网络中的所有别的Unix 和PC/AT 机的资源.在每个模拟器元胞下面的Intrinsix 元胞层保证与现存的软件模拟器的相容性.通过这种技术,为所有的这些软件模
Until now, only people with expensive hardware simulators or enough time to run soft tools could make fault simulations.Intrinsix’s Fas-Fault family of fault simulation tools will be based on a hardware-based core with an effective software phase The analysis was performed at a computational speed of 2 × 10 / s The first two Fas Fault versions simulate 10000 and 25 (?) 00 digital gates and are available in 100,000-gate versions by the end of this year. Accelerator-based Fas Fault The product enables rapid, deterministic, sequential fault simulation. By building a virtual tester in traditional hardware, users are able to implement elemental delay logic simulations at rates as high as, for example, 100,000-gate Intrinsix standard circuit logic simulations with 9500 A vector of seven seconds to complete.The Fas Fault consists of a C-based software program and a PC / AT plugged into the 30236 and 80 (?) 6 expansion boards.The system can also be used as a Other Unix and PC / AT machines. The Intrinsix cell layer under each simulator cell guarantees compatibility with existing software simulators. With this technique, for all these Software model