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设计了一种适用于加速度计接口电路的全差分Σ-Δ调制器。该电路基于1位量化的4阶单环前馈结构,利用根轨迹法分析了该高阶系统的稳定性,采用斩波稳定技术降低了低频噪声和失调电压。电路采用标准CMOS工艺流片,测试结果显示,在5V电源电压和250kHz采样频率下,功耗约为20mW;当过采样率为125时,不带斩波技术的调制器的SNR为89dB,带斩波技术调制器的SNR为99dB。通过对比测试,验证了设计思路的正确性。
A fully differential sigma-delta modulator for accelerometer interface circuit is designed. The circuit is based on a 4-order single-loop feedforward quantized quantile and the stability of the high-order system is analyzed by root locus method. The chopper stabilization technique is used to reduce the low-frequency noise and offset voltage. The circuit uses a standard CMOS process chip, the test results show that the 5V power supply voltage and 250kHz sampling frequency, the power consumption of about 20mW; when the oversampling rate of 125, without chopper technology modulator SNR 89dB, with band The chopper technology modulator’s SNR is 99dB. Through the comparison test, verify the correctness of the design ideas.