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介绍基于FPGA的判决反馈均衡器设计,均衡器中采样LMS算法;在使用相同算法的前提下,比较线性均衡器和判决反馈均衡器的性能及不同抽头系数的判决反馈均衡器的性能,用VHDL语言实现判决反馈均衡器,并在Active HDL仿真软件中进行仿真。
The design of decision feedback equalizer based on FPGA and sampling LMS algorithm in equalizer are introduced. The performance of linear equalizer and decision feedback equalizer and the decision feedback equalizer with different tap coefficients are compared under the same algorithm. The language implements a decision feedback equalizer and is emulated in Active HDL simulation software.