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快总线(FASTBUS)标准是在70年代中期提出来的一种有分布式处理功能的新总线结构。当时高能物理实验规模发展很快,新型探测器大量地被采用,已经广泛使用的CAMAC 标准不能满足要求,因此高能物理实验工作者感到有发展下一代的数据获取及处理系统的必要。1976年在NIM 委员会的资助下成立了快总线设计组(FASTSYSTEMDESIGN GROUP.FSDG)负责发展一种新的标准,即快总线标准(FASTBUS)。考虑到新一代数据获取及处理的需要,他们认为快总线的目标应为:a)数据传输速度应比当时的CAMAC系统高一个量级,即数据块传输方式为80兆字/秒,随机传输方式为20～40兆字/秒。b)即可用流水线传输方式以达到最快的传输速度,也能用应答式传输(即同步传输方式)以适应与不同速度的设备进行数据交换。c)整个系统分成段(Segment),在一个段内主设备可多至31台。系统采用的仲裁方式使主设备在竞争总线使用权方面与它所在的位置无关。数据可以在任何一个子系统层次进行处理,以减少数据在系统中的传输量。d)系统范围内的协议是相同的,与具体线路无关。在系统级上能执行宏命令及广播命令。e)使用逻辑寻址,设备的逻辑地址与它所处在段的地址无关。f)有大的寻址空间,地址/数据线为32位,便于建立多维直方图及图像处理。g)有系统诊断能力。h)模块结构,能把通用仪器做为一个模块加入系统,以达到经济上节约和得到生产者的支持。快总线规范从开始制定到现在已经过多次修改,现在仍在发展及修改过程中。规范包括机械结构标准,如机箱尺寸,插座型号,后面板布线,电源安装,冷却系统,模块规格等等;电气标准有信号电平,总线分配,状态及控制寄存器所占的空间分配,时序及各种信号间的关系等等。这些标准在快总线规范中都做了明确的规定。我们在此仅对快总线的逻辑结构及系统功能做较详细的介绍。
Fast Bus (FASTBUS) standard is proposed in the mid-70s with a distributed processing capabilities of the new bus structure. At that time, the scale of high-energy physics experiment was developing rapidly. New detectors were widely used. The widely used CAMAC standard could not meet the requirements. Therefore, high-energy physics experimenters felt it necessary to develop the next generation data acquisition and processing system. In 1976, the Fastbus Design Group (FASTSYSTEMDESIGN GROUP.FSDG) was established under the auspices of the NIM Committee to develop a new standard, the Fast Bus Standard (FASTBUS). Considering the need of a new generation of data acquisition and processing, they think the goal of fast bus should be: a) The data transmission speed should be one order of magnitude higher than the current CAMAC system, ie the data block transfer method is 80 MB / s, random transfer The way is 20 ~ 40 megabytes / second. b) that can be used to achieve the fastest pipeline transmission speed transmission, but also can use the answer-type transmission (ie synchronous transmission) to adapt to different speeds of data exchange equipment. c) The entire system is divided into Segment, the main equipment in a paragraph can be up to 31 units. The arbitration method adopted by the system makes the master device independent of its location in the race to access the bus. Data can be processed at any one subsystem level to reduce the amount of data that can be transferred to the system. d) System-wide protocols are the same regardless of the specific line. At the system level can perform macro commands and broadcast commands. e) Using logical addressing, the device’s logical address is independent of the address of the segment it is in. f) Large addressing space with 32 bits address / data line for easy setup of multi-dimensional histograms and image processing. g) System diagnostic capability. h) Modular construction that allows the universal instrument to be added to the system as a module for economic savings and producer support. Fast bus specification from the beginning to now has been modified many times, is still under development and modification process. Specifications include mechanical construction standards such as chassis size, receptacle type, rear panel wiring, power supply installation, cooling system, module specifications, etc. Electrical standards include signal level, bus assignment, status and control registers for space allocation, timing and The relationship between various signals and so on. These standards in the fast bus specification has made a clear provision. Here, we only introduce the logic bus structure and system functions in more detail.