Effects of interface trap density on the electrical performance of amorphous InSnZnO thin-film trans

来源 :Journal of Semiconductors | 被引量 : 0次 | 上传用户:chengchao5618
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We reported the influence of interface trap density(Nt) on the electrical properties of amorphous InSnZnO based thin-film transistors,which were fabricated at different direct-current(DC) magnetron sputtering powers.The device with the smallest N_t of 5.68×10~(11) cm~(-2) and low resistivity of 1.21×10~(-3)Ω·cm exhibited a turn-on voltage(V_(ON)) of-3.60 V,a sub-threshold swing(S.S) of 0.16 V/dec and an on-off ratio(I_(ON)/I_(OFF)) of~8 x 108.With increasing N_t,the V_(ON),S.S and I_(ON)/I_(OFF) were suppressed to-9.40 V,0.24 V/dec and 2.59×10~8,respectively.The V_(TH) shift under negative gate bias stress has also been estimated to investigate the electrical stability of the devices.The result showed that the reduction in N_t contributes to an improvement in the electrical properties and stability. We reported the influence of interface trap density (Nt) on the electrical properties of amorphous InSnZnO based thin-film transistors, which were fabricated at different direct-current (DC) magnetron sputtering powers. The device with the smallest N_t of 5.68 × 10 ~ (11) cm -2 and low resistivity of 1.21 × 10 -3 Ω · cm, a turn-on voltage (V ON) of-3.60 V, a sub-threshold swing (SS) of 0.16 V / dec and an on-off ratio (I_ (ON) / I_ (OFF)) of ~8 x 108. With increasing N_t, the V_ (ON), SS and I_ (ON) / I_ (OFF) were suppressed to-9.40 V, 0.24 V / dec and 2.59 × 10 -8, respectively. The V_ (TH) shift under negative gate bias stress has also been estimated to investigate the electrical stability of the devices. The result showed that the reduction in N_t contributes to an improvement in the electrical properties and stability.
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