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1 引言近十年来,计算机结构中一个最活跃最激动人心的领域就是已形成并行或并发系统的计算机互联。这些系统一般称为“多处理器”或“分布式处理器”,其范围包括共享一个公共存储器的多处理器到地理上分隔连接成网的计算机。生产LSI微处理器的容易性和低成本使得用这种系统来实现通用的多处理器系统具有非常诱人的前景。然而,用于实现微处理器主要部分的MOS技术限制了指令执行的速率,以致于许多应用受到了计算量的限制而不是受到其他系统带宽的限制。这表明若干微处理器可以有效地互联起来,以增强通用系统的性能。在本文中,我们要讨论由多微处理器构成的通用系统的特性,并力图导出一套一种模块化的以微处理器为基础的多处理器的设计要求。给出这些特性和设计要求后,我们将讨论两种通用的互联方案:全局总线和双端口存储器,并分析它们的适应性。最后我们从系统吞吐量的极限和最佳经济效益两个方面,描述模块化多处理器LFS-1的结构,并模拟它的实现。
1 Introduction The most active and exciting area of computer architecture in the last decade has been the interconnection of computers that have formed parallel or concurrent systems. These systems are commonly referred to as “multiprocessors” or “distributed processors,” and their scope includes multiprocessors sharing a common memory to geographically separated, networked computers. The ease and low cost of producing LSI microprocessors makes for a very attractive prospect of implementing a versatile multiprocessor system with such a system. However, the MOS technology used to implement the main part of the microprocessor limits the rate at which instructions can be executed, so that many applications are limited in their amount of computations without being limited by the bandwidth of other systems. This shows that several microprocessors can be effectively interconnected to enhance the performance of common systems. In this article, we discuss the features of a general purpose system of multi-microprocessors and try to derive a set of design requirements for a modular, microprocessor-based multiprocessor. Given these features and design requirements, we will discuss two common interconnect scenarios: global bus and dual port memory, and analyze their adaptability. Finally, we describe the structure of the modular multiprocessor LFS-1 and simulate its implementation from both the system throughput limit and the best economic efficiency.