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1553B是一种数字式命令/响应型时分多路航空数据总线标准。传统的1Mb/s 1553B总线接口电路已不能满足现代高速航空、航天数据通讯的要求。介绍了10Mb/s 1553B总线接口的设计,对关键模块进行了详细分析与设计,并通过编译平台Modelsim6.0进行功能仿真,采用Xilinx VertexⅣFPGA硬件系统进行组网应用验证。结果表明,该设计满足1553B协议功能要求,总线速率达到10Mb/s,满足10Mb/s 1553B总线组网应用的需求。
The 1553B is a digital command / response time division multiple access air data bus standard. The traditional 1Mb / s 1553B bus interface circuit has been unable to meet the requirements of modern high-speed aviation and space data communication. The design of 10Mb / s 1553B bus interface is introduced, the key modules are analyzed and designed in detail, and the functions are simulated by Compile Platform Modelsim6.0. The application of Xilinx VertexIVFPGA hardware system is verified. The results show that the design meets the functional requirements of 1553B protocol and the bus speed reaches 10Mb / s, meeting the requirements of 10Mb / s 1553B bus network application.