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提出了一种用于双波段GPS接收机的宽带CMOS频率合成器.该GPS接收机芯片已经在标准0.18μm射频CMOS工艺线上流片成功,并通过整体功能测试.其中压控振荡器可调振荡频率的覆盖范围设计为2~3.6GHz,覆盖了L1,L2波段的两倍频的频率点,并留有足够的裕量以确保在工艺角和温度变化较大时能覆盖所需频率.芯片测试结果显示,该频率综合器在L1波段正常工作时的功耗仅为5.6mW,此时的带内相位噪声小于-82dBc/Hz,带外相位噪声在距离3.142G载波1M频偏处约为-112dBc/Hz,这些指标很好地满足了GPS接收芯片的性能要求.
A wideband CMOS frequency synthesizer for dual band GPS receiver is proposed.The chip has been successfully streamed on a standard 0.18μm RF CMOS process line and passed the overall functional test.The VCO oscillator The frequency coverage is designed to range from 2 to 3.6 GHz, covering twice the frequency of the L1 and L2 bands, leaving enough headroom to cover the required frequency when the process angle and temperature changes are large. The test results show that the frequency synthesizer consumes only 5.6mW when the L1 band is operating normally. The in-band phase noise is less than -82dBc / Hz. The out-of-band phase noise is about -112dBc / Hz, these indicators well meet the GPS receiver chip performance requirements.