Performance Estimation of HEVC/h.265 Decoder in a Co-Design Flow with SADF-FSM Graphs

• 作 者: Habib Smei Abderrazak Jemai Ka
• 机 构: LaboratoryLIP2,GeneralDirectorateofTechnologicalStudies,UniversityofCarthage,UniversityofManouba
• 出 处: 通讯、网络与系统学国际期刊(英文)
• 发表日期: 2017年11期
• 关键词: HEVC H.265 Performance Estimation SDF SADF SADF-FSM Embedded Systems HEVC h.265

Multiprocessor System on Chip (MPSoC) technology presents an interesting solution to reduce the computational time of complex applications such as multimedia applications. Implementing the new High Efficiency Video Coding (HEVC/h.265) codec on the MPSoC a