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随着制造工艺的快速进步 ,超大规模集成电路的物理设计技术在速度和质量上面临很大挑战 .提出了一个快速详细布局算法以适应这种要求 .算法继承总体布局得到的单元全局最佳位置 ,然后采用局部优化将单元精确定位 .FM最小割和局部枚举方法分别用于优化 y和 x两个方向的连线长度 ,这两个方向的优化在同一迭代过程中交替进行 .另外 ,采用改进的枚举策略加速算法 ,对于有障碍和宏模块情况下的布局也加以讨论 .实例测试结果表明 ,FAME的运行速度比 RITUAL快 4倍 ,并使总连线长度平均减小 5% .
With the rapid development of manufacturing technology, the physical design technology of VLSI is challenged in terms of speed and quality, and a fast and detailed layout algorithm is proposed to meet this requirement.Algorithm inherits the best global position of the unit , And then use local optimization to locate the unit accurately.FM minimum cut and local enumeration methods are used to optimize the length of the connection between y and x respectively.The optimization of these two directions alternates in the same iteration.In addition, The improved enumeration strategy acceleration algorithm is also discussed in the case of disruption and macro-module layout.Examples The test results show that FAME runs 4 times faster than RITUAL and reduces the total connection length by an average of 5%.