A simplified compact model of miniaturized cross-shaped CMOS integrated Hall devices

• 作 者: 黄海云 王德君 李文波 徐跃 秦会斌 胡永才
• 机 构: School of Electronic Science and Technology,Faculty of Electronic Information and Electronic Enginee
• 出 处: 半导体学报
• 发表日期: 2012年08期
• 关键词: simplified shaped classic junction drift hardware Cadence accordance offset dopi

A simplified compact model for a miniaturized cross-shaped CMOS integrated Hall device is presented. The model has a simple circuit structure,only consisting of a passive network with eight non-linear resistors and four current-controlled voltage sources.It completely considers the following effects:non-linear conductivity,geometry dependence of sensitivity,temperature drift,lateral diffusion,and junction field effect.The model has been implemented in Verilog-A hardware description language and was successfully performed in a Cadence Spectre simulator.The simulation results are in good accordance with the classic experimental results reported in the literature.

A simplified compact model for a miniaturized cross-shaped CMOS integrated Hall device is presented. The model has a simple circuit structure, only consisting of a passive network with eight non-linear resistors and four current-controlled voltage sources. effects: non-linear conductivity, geometry dependence of sensitivity, temperature drift, lateral diffusion, and junction field effect. The model has been implemented in Verilog-A hardware description language and was successfully performed in a Cadence Spectre simulator. The simulation results are in good accordance with the classic experimental results reported in the literature.