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随着片上系统(SOC)技术的发展,越来越多的功能模块被集成到单一芯片中。适合硬件描述的HDL语言很难满足实现复杂算法功能的要求,C++等高级语言可以高效地描述算法功能,但是在综合和验证时遇到很大困难。文章介绍了一种允许使用C和VHDL独立描述原始模块,通过创建统一内部模型IIR的办法实现对功能元件和算法模块的混合处理。IIR内部模型以XML文件格式作为外部存储,能够方便地被划分、综合、验证等处理程序使用,避免了重复的原始描述文件分析,提高了研发效率。
With the development of system-on-chip (SOC) technology, more and more functional modules are integrated into a single chip. The HDL language suitable for hardware description is difficult to meet the requirements for implementing complex algorithm functions. High-level languages such as C ++ can efficiently describe the algorithm functions, but encounter great difficulties in synthesis and verification. This article describes a hybrid approach that allows functional elements and algorithmic modules to be implemented by using C and VHDL to independently describe the original module and by creating a unified internal model IIR. The IIR internal model uses XML file format as external storage and can be easily divided, integrated, verified and used by other processing programs to avoid repeated analysis of the original description files and improve the R & D efficiency.