A 1.5 bit/s Pipelined Analog-to-Digital Converter Design with Independency of Capacitor Mismatch

• 作 者: 李丹 戎蒙恬 毛军发
• 机 构: SchoolofElectronicInformationandElectricalEng.ShanghaiJiaotongUniv.,SchoolofElectronicInformationand
• 出 处: Journal of Shanghai Jiaotong University
• 发表日期: 2007年4期
• 关键词: charge TEMPORARY storage technique (CTST) residual voltage CAPACITOR MISMATCH PI

A new technique which is named charge temporary storage technique (CTST) was presented to improve the linearity of a 1.5 bit/s pipelined analog-to-digital converter (ADC). The residual voltage was obtained from the sampling capacitor, and the other capaci