论文部分内容阅读
沿着介质界面的与时间有关的横向电荷分离可以在集成电路中引起场效应晶体管(EFT)漏电。对双极工艺进行研究所采用的物理分析表明,横向电荷分离发生在沿氮化硅/溅射的石英界面处。我们用电子束感应电流技术观察了硅中的感应寄生FET漏电。通过场屏敞或场保护可以防止这种寄生FET漏电。沿着热生长二氧化硅/氮化硅界面产生的横向电荷分离不引起寄生FET漏电,但要导致横向PNP晶体管共发射极电流增益的增大。通过在热生长二氧化硅上淀积一层磷硅玻璃而使这种不稳定性得以消除。文章介绍了作为寄生FET漏电根源的消除的热载流子注入的证据,还研究了工艺技术和电路布局对寄生FET耐电的影响。
The time-dependent lateral charge separation along the media interface can cause field-effect transistor (EFT) leakage in the integrated circuit. Physical analysis of the bipolar process used in the study showed that lateral charge separation occurred along the silicon nitride / sputtered quartz interface. We observed induced parasitic FET leakage in silicon using electron beam induced current technology. This parasitic FET leakage can be prevented by field screen or field protection. Lateral charge separation along the thermally grown silicon dioxide / silicon nitride interface does not cause parasitic FET leakage but results in an increase in the common emitter current gain of the lateral PNP transistor. This instability is eliminated by depositing a layer of phosphosilicate glass on the thermally grown silica. This article describes evidence of hot carrier injection as a source of parasitic FET leakage and also studies the effect of process technology and circuit layout on the parasitic FETs’ resistance to electricity.