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给出了两种实时图象３×３卷积的设计方案。为避免使用昂贵的乘法器集成电路，本文利用硬件查找表方案来降低成本、实时实现相乘运算。其中：方案一根据乘法分配律来简化硬件查找表的构成；方案二通过将８ｂｉｔ的灰度图象数据看成８个位面二值图象的叠加来实现方案的简化。文中还．提供了卷积器中可变行延迟、卷积数据变换后处理电路的设计方案。两种方案均可由市场有售的普通型号小规模集成电路较低成本实现。
Two designs of 3 × 3 convolutions for real-time image are given. In order to avoid using expensive multiplier integrated circuits, this paper uses the hardware look-up table scheme to reduce costs, real-time multiplication. The first scheme simplifies the composition of the hardware look-up table according to the multiplicative assignment law. The second scheme simplifies the scheme by considering the gray image data of 8 bits as the binary image of 8 bit planes. Text also. It provides the design of variable-line-delay and convoluted data transform post-processing circuit in the convolver. Both options are commercially available at a lower cost than conventional models of small scale integrated circuits.