A Systolic Approach for an Improvement of a Finite Field Multiplier

• 作 者: 戚余禄
• 机 构: Institute of Computing Technology Academia Sinica,
• 出 处: Journal of Computer Science and Technology
• 发表日期: 1987年04期
• 关键词: systolic compute multiplier likely hardware utilized realized operations noted m

This paper proposes a systolic finite multiplier, which appears to functionreasonably. And it shows that systolic architecture is a useful design tool for compute-bound applications.

This paper proposes a systolic finite multiplier, which appears to functionreasonably. And it shows that systolic architecture is a useful design tool for compute-bound applications.