A low power automatic gain control loop for a receiver

• 作 者: 李国锋 耿志卿 吴南健
• 机 构: State Key Laboratory for Super lattices and Microstructures,Institute of Semiconductors,Chinese Acad
• 出 处: 半导体学报
• 发表日期: 2010年09期
• 关键词: receiver amplifier keying linearity unchanged drain transceiver offset eliminati

This paper proposes a new structure to lower the power consumption of a variable gain amplifier(VGA) and keep the linearity of the VGA unchanged.The structure is used in a high rate amplitude-shift keying(ASK) based IF-stage.It includes an automatic gain control(AGC) loop and ASK demodulator.The AGC mainly consists of sixstage VGAs.The IF-stage is realized in 0.18μm CMOS technology.The measurement results show that the power consumption of the whole system is very low.The system consumes 730μA while operating at 1.8 V.The minimum ASK signal the system could detect is 0.7 mV(peak to peak amplitude).

This paper proposes a new structure to lower the power consumption of a variable gain amplifier (VGA) and keep the linearity of the VGA unchanged. The structure is used in a high rate amplitude-shift keying (ASK) based IF-stage.It includes an automatic gain control (AGC) loop and ASK demodulator. The AGC mainly consists of six stage VGAs. IF-stage is realized in 0.18 μm CMOS technology. measurement results show that the power consumption of the whole system is very low. system consumes 730μA while operating at 1.8 V. The minimum ASK signal the system could detect is 0.7 mV (peak to peak amplitude).