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我厂生产的P-MOS数控电路是在清华大学十五个品种的基础上发展起来的。三年来,成品率有了一定的提高。在一套设备一套生产线的情况下,1977年产量达到35万块的水平。目前,从整个生产线一段时期的平均成品率来看4×2与非门MOS-Q(驱动管40:1,负载管3:2)管芯合格率在50％以上,较好的批次达到60～65％,寄存器MOS-J(4闩锁触发器)1977年下半年平均总成品率达到29％。中规模二—十进制计数器MMJ-4(130余个元件)平均管芯合格率高于25％,较好的批次达30～50％,比建线初期提高一倍左右。我们的中测除功能测试外,还测了输入端漏电流,成品100％的进行高温电老化筛选,管芯总数的计算是用平均有效硅片面积(767毫米~2)除以总片实际尺寸。例MOS-Q总片为1.33毫米×1.28毫米每片400管芯,合格管芯在200～300个之间二—十进制计数器MMJ-4芯片尺寸为1.74毫米×1.62毫米平均每片240管芯,一般出合格管芯50～100个。最好的批次达150个。
The P-MOS numerical control circuit that our factory produces is developed on the basis of fifteen varieties of Tsinghua University. In the past three years, the yield has been somewhat improved. In a case of a set of equipment production line, 1977 production reached 350,000 level. At present, judging from the average yield of the whole production line over a period of time, the pass rate of 4 × 2 NAND gate MOS-Q (drive tube 40: 1, load tube 3: 2) is above 50%, and the better batch 60 to 65%, register MOS-J (4 latch trigger) the second half of 1977 the average total finished product rate reached 29%. Medium-sized two-decimal counter MMJ-4 (more than 130 components) average die pass rate higher than 25%, a better batch of 30 to 50%, double the initial line than about. In addition to our midline test, the input leakage current was also measured. 100% of the finished product was subjected to high temperature electrical aging screening. The total number of dies was calculated by dividing the total effective silicon area (767 mm 2) size. Example MOS-Q Total Chip 1.33 mm x 1.28 mm 400 Die Per Chip, Qualified Die Between 200 and 300 Two-Decimal Counter MMJ-4 Chip Size 1.74 mm x 1.62 mm Average 240 Die Per Chip, Generally qualified die 50 to 100. The best batch of 150.