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图面的简单说明: 图1至图5是本发明希望实施的平面图,电路图以及图1中沿aa,bb和箭头符号方向的剖面图。 发明的详细说明: 本发明适用于集成度高,有复杂的布线结构的半导体集成电路, 特别适用采用多晶隔离法的半导体集成电路。一般所用的半导体集 成电路中（导电的半导体衬底）,在表面上具有多个相反导电类型 的,在电气上相互绝缘的外延部分,在外延部分内部选择地扩散形
BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 to Fig. 5 are a plan view, a circuit diagram, and a cross-sectional view taken along the lines aa, bb and arrow in Fig. 1 of the present invention. DETAILED DESCRIPTION OF THE INVENTION The present invention is applicable to a semiconductor integrated circuit having a high degree of integration and a complicated wiring structure, and is particularly suitable for a semiconductor integrated circuit using a polycrystalline isolation method. Conventionally used semiconductor integrated circuits (conductive semiconductor substrates) have on the surface thereof a plurality of epitaxial portions which are electrically insulated from each other of the opposite conductivity type and are selectively diffused inside the epitaxial portions