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为了减少数字预失真系数的数量,提出了阶梯记忆多项式(SMP)预失真器.该预失真器通过改变传统记忆多项式预失真器中不同记忆深度对应的最大非线性阶数以降低系数数量.SMP预失真器系数的提取采用离线学习结构,直接通过功率放大器(PA)的输入、输出采样数据计算预失真系数.仿真结果表明了SMP预失真器的鲁棒性,它并不局限于某一特定PA模型.SMP预失真器的有效性分别在记忆多项式模型、并行Wiener模型、Wiener-Hammerstein模型、非单位延时记忆多项式模型和基于Freescale LDMOSFET MRF21030制作的实际PA上,通过仿真和实验的方式进行了验证.与传统MP预失真器相比, SMP预失真器可减少系数数量60%以上.
In order to reduce the number of digital predistortion coefficients, a step memory polynomial (SMP) predistorter is proposed, which reduces the number of coefficients by changing the maximum nonlinear order of different memory depths in traditional memory polynomial predistorters. The pre-distorter coefficients are extracted using off-line learning structure, and the predistortion coefficient is calculated directly from the input and output sampling data of the power amplifier (PA). The simulation results show the robustness of the SMP predistorter, which is not limited to a specific PA model.The effectiveness of the SMP pre-distorter is simulated and experimentally implemented in memory polynomial model, parallel Wiener model, Wiener-Hammerstein model, non-unit delay memory polynomial model, and real PA based on Freescale LDMOSFET MRF 21030 Validated. Compared with the traditional MP predistorter, SMP predistorter can reduce the number of coefficients more than 60%.