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介绍了一种 Ｃ Ｍ Ｏ Ｓ标准单元库评估电路的设计思想， 分别就单元延迟参数、扇出延迟特性、线负载延迟特性、触发器延迟特性、最高振荡频率等参数设计了相应的测试链， 给出了评估电路总的结构形式和版图。
A design idea of C M O S standard cell library evaluation circuit is introduced. Corresponding test chains are designed respectively on the parameters of cell delay, fan out delay, line load delay, trigger delay and the maximum oscillation frequency. The overall structure and layout of the evaluation circuit are given.