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介绍一种高速低相差双路ＡＤ数据采集器．通过使用比要求的采样速度更高速的ＡＤＣ及对两路ＡＤＣ进行严格的同步控制等措施，设计出的ＡＤ数据采集器具有相位抖动小于１个采样周期，并与采样速度无关，且对接口速度要求低。接口硬件简单等特点．实验表明，对频率为５Ｈｚ的模拟输入信号，其相位分辨率可达 ５ × １０－５ｒａｄ．
Describes a high-speed low-phase dual AD data acquisition device. Through the use of higher than the required sampling speed of the ADC and the two ADCs strictly synchronous control measures, designed AD data acquisition with phase jitter less than 1 sampling period, and has nothing to do with the sampling speed, and the interface speed Low demand. Interface hardware is simple and so on. Experiments show that the frequency of 5Hz analog input signal, the phase resolution of up to 5 × 10-5rad.