论文部分内容阅读
本文讨论一种新的静态双极存储器的设计,它在密度方面可以与动态场效应晶体管存储器相当,而在性能与功耗方面较优越。少数载流子直接注入的概念既适用于单元电流,又适用于耦合到读/写线。这就导致了器件非常高的集成度,在采用5μ线宽的标准埋层工艺和单层布线时,单元尺寸达3.1mil~2。根据一些包含小矩阵的研究性单片的试验完全证实了这种可能性。单元可在低于100nW 的非常低的直流维持功耗下工作。从模拟64×64位矩阵的测量中可以推算出,一块4K 位的硅片面积大约为160×150mil~2,取数时间大约50ns。采用介质隔离和自对准N~+引线孔的新方法可得到5μ线宽的1.1mil~2的单元。
This article discusses the design of a new static bipolar memory that is comparable in density to dynamic field-effect transistor memory with superior performance and power consumption. The concept of minority carrier direct injection applies both to the cell current and to the read / write line. This led to a very high degree of integration of the device, with a cell size of 3.1 mil ~ 2 when using standard buried technology with 5μ line width and single-layer wiring. This possibility is fully confirmed on the basis of a number of research monolithic experiments involving small matrices. The unit can operate with very low DC holding power below 100nW. From the simulation of 64 × 64 matrix measurement can be calculated, a 4K bit silicon area is about 160 × 150mil ~ 2, take a few of the time about 50ns. The new method of using dielectric isolation and self-aligning N ~ + lead-through holes can obtain 1.1mil ~ 2 cells of 5μ linewidth.