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程控多路时钟发生器,具有可程控、数字化、高精度、高分辨率的特点。本文探讨时钟发生器的技术关键——高分辨率问题。高分辨率包括两个方面:周期10 nS分辨率,和延迟1 nS分辨率。本文在分析电路原理的基础上叙述其设计。周期10 nS分辨率,重点叙述使用E 100系列组件达到指标的有关问題。延迟1 nS分辨率,重点叙述实现1 nS的延迟的同时如何控制脉宽不变的问题。用于延迟或传输的微带线设计也是本文的议题之一。
Programmable multi-channel clock generator, with programmable, digital, high-precision, high-resolution features. This article explores the key technology of clock generators - high resolution. High resolution includes two aspects: the cycle 10 nS resolution, and delay 1 nS resolution. This paper describes the design of the circuit based on the analysis of the principle. Cycle 10 nS resolution, focusing on the use of E100 series components to achieve the relevant issues. Delay 1 nS resolution, focusing on the realization of 1 nS delay at the same time how to control the problem of constant pulse width. The design of microstrip lines for delay or transmission is also one of the topics in this article.