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The effect of the different re-oxidation annealing(ROA) processes on the SiO2/SiC interface characteristics has been investigated. With different annealing processes, the flat band voltage, effective dielectric charge density and interface trap density are obtained from the capacitance–voltage curves. It is found that the lowest interface trap density is obtained by the wet-oxidation annealing process at 1050 C for 30 min, while a large number of effective dielectric charges are generated. The components at the SiO2/SiC interface are analyzed by X-ray photoelectron spectroscopy(XPS) testing. It is found that the effective dielectric charges are generated due to the existence of the C and H atoms in the wet-oxidation annealing process.
The effect of the different re-oxidation annealing (ROA) processes on the SiO2 / SiC interface characteristics has been investigated. With different annealing processes, the flat band voltage, the effective dielectric charge density and interface trap density are obtained from the capacitance-voltage curves It is found that the lowest interface trap density is obtained by the wet-oxidation annealing process at 1050 C for 30 min, while a large number of effective dielectric charges are generated. The components at the SiO2 / SiC interface are analyzed by X- ray photoelectron spectroscopy (XPS) testing. It is found that the effective dielectric charges are generated due to the existence of the C and H atoms in the wet-oxidation annealing process.