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针对无线视频通讯H.264编码器关键技术VBSME VLSI实现,提出了一种低复杂度结构,该结构由宏块输入缓存器,17×16蛇形扫描寄存器阵列,8×8PE阵列,4×4SAD加法树和四步可变块运动矢量生成器组成。在有效保持所有的H.264宏块特性的基础上,相对于宏块级的VBSME结构,通过采用新提出的四步可变块运动矢量生成器和双时钟频率调谐技术,主要的数据通道宽度缩减到25%,硬件代价缩减到37%,关键路径延时由9.8ns减少到8.2ns,功耗约降低了50.3%。
Aiming at the VBSME VLSI implementation of wireless video communication H.264 encoder, a low complexity structure is proposed, which consists of macroblock input buffer, 17 × 16 serpentine scan register array, 8 × 8PE array, 4 × 4SAD Addition tree and four-step variable block motion vector generator. Based on the macroblock-based VBSME architecture, the new proposed four-step variable block motion vector generator and dual-clock frequency tuning techniques are used to maintain all the H.264 macroblock characteristics. The main data channel width Reduced to 25%, the hardware cost reduced to 37%, critical path delay reduced from 9.8ns to 8.2ns, power consumption decreased by about 50.3%.