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Medical applications, wireless sensor networks and many other portable applications are only possible if we can build devices that can perform the mathematically demanding cryptographic operations.Unfortunately,many of these sensor nodes, RFID tags and others, operate under extremely limited power and area constraints.Yet we expect that they can execute,often in real-time, the symmetric key, public key and/or hash functions needed for the protocols.At the same time, we request that the implementations are also secure against a wide range of physical attacks.This presentation will focus on the implementation aspects of cryptographic operations on resource constrained devices.To reach the extremely low power and area budgets, we need to look in an integrated way at the protocols, the algorithms, the architectures and the circuit aspects of the implementation of the security protocol.This will be illustrated with the design of several cryptographic co-processors suitable for implementation in ASIC or FPGA.