【摘 要】
：
In this paper, a 4F2 epitaxial diode array T-CAD calibrated Model for Phase change memory(PCM) obeyed 40nm CMOS technology is presented.According to the diode array process scheme and numerical simula
【机 构】
：
State Key Laboratory of Functional Materials for Informatics,Shanghai Institute of Mierosystem and I
【出 处】
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International Conference on Nanoscience & Technology,China 2
论文部分内容阅读
In this paper, a 4F2 epitaxial diode array T-CAD calibrated Model for Phase change memory(PCM) obeyed 40nm CMOS technology is presented.According to the diode array process scheme and numerical simulation results, the relationship between device parameters and electrical characteristics including drive-current, breakdown voltage and disturb-current is analyzed.The thermal process impacts on diode array performance especially the effective range of thermal positive feedback and the cross-talk issues, are discussed in terms of this model.Furthermore, the scaling-down effects on diode array are also investigated, the model is also useful for future in the next generation.
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