【摘 要】
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This paper presents logic design debugging with Xilinxs ChipScope Pro tool for transferring in-phase and quadrature(IQ)data samples of a wireless receiver from Wireless-Access Research Platform(WARP)v
【机 构】
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Telekom Malaysia R&D
【出 处】
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2016年第十二届无线通信、网络技术与移动计算国际学术会议(WICOM2016)
论文部分内容阅读
This paper presents logic design debugging with Xilinxs ChipScope Pro tool for transferring in-phase and quadrature(IQ)data samples of a wireless receiver from Wireless-Access Research Platform(WARP)v3 board to an application software on PC via UDP over Ethernet link.With limited user IO pins on WARP board,an embedded logic analyser core from ChipScope Pro provides debugging visibility of relevant signals within FPGA logic fabric for design verification.We have successfully implemented UDP over Ethernet data transfer logic design by integrating OFDM modem,small footprint point-to-point UDP controller and Xilinxs Tri-mode MAC core.Packet communication visibility has been provided by WireShark packet analysis tool.
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