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FPGAs nowadays are not only design prototyping platforms but also main design techniques.The same as the most of electronic products,FPGAs face big challenges in nanometer CMOS technology era,such as process variations etc,as well.These challenges motivate researchers to develop either new FPGA design techniques or new kinds of FPGAs.ITRS predicts that asynchronous circuits will take 30-40%more in a chip design in 2020 and even more portions in the far future.This means that asynchronous techniques will play an important role in the future.In addition,asynchronous techniques are possibly best solutions for tolerating process variations.However so far asynchronous techniques are still immature and there exist a number of problems on designing asynchronous FPGAs.Design automation is the major one now.Recently a kind of asynchronous FPGAs has been proposed.This proposed architecture keeps the traditional logic block structure and introduces the concept of an asynchronous wrapper around it.The asynchronous FPGA has potential advantages for design engineers to learn and design,since its architecture keeps the basic structure of the conventional FPGAs,and provides abilities to use the existing EDA toolkits.However,it has not yet been fully explored.In this talk,some latest research on this of kind of asynchronous FPGAs is introduced.In addition,a structure tile based programmable logic proposed for tolerating process variations is introduced as well as an extra.