【摘 要】
：
A Multiple-Input Multiple-Output(MIMO)Diagonally–Bell Laboratories Layered Space-Time(D-BLAST)codec algorithm which is fitted for Field Programmable Gate Array(FPGA)implementation was designed.A MIMO
【机 构】
：
The 58th Research Institute of China Electronic Technology Group Corporation,Wuxi,Jiangsu,China
【出 处】
：
2016年第十二届无线通信、网络技术与移动计算国际学术会议(WICOM2016)
论文部分内容阅读
A Multiple-Input Multiple-Output(MIMO)Diagonally–Bell Laboratories Layered Space-Time(D-BLAST)codec algorithm which is fitted for Field Programmable Gate Array(FPGA)implementation was designed.A MIMO D-BLAST base-band processing system on the Xilinx Virtex4-VC4VSX55 test-bed was developed based on verilog hardware description language.The bit error rate(BER)performance of the D-BLAST was simu-lated by FPGA implementation where two detection algo-rithms,Zero Forcing-Successive Interference Cancellation(ZF-SIC)and Minimum Mean-Squared Error-SIC(MMSE-SIC),were adopted respectively.Simulation analysis and experimental results show the correctness and efficiency of the FPGA D-BLAST base-band processing system.It is also shown that the BER performance of D-BLAST is better than that of V-BLAST on the same condition.
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